TWR-S12G240【PDF 71/1292 页】TOWER SYSTEM MODULE S12G240

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Device Overview MC9S12G-Family

Table 1-12. 32-Pin LQFP Pinout for S12GN48

Function

Internal Pull

<----lowest-----PRIORITY-----highest---->

Power

Resistor

Package Pin

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

Pin

VSS

PE1 1

TEST

BKGD

PP0

PP1

PP2

PP3

PT3

PT2

PT1

PT0

PAD0

PAD1

PAD2

PAD3

PAD4

PAD5

PAD6

PAD7

PS0

PS1

PS4

PS5

PS6

PS7

PM0

PM1

2nd

Func.

—

XTAL

—

MODC

KWP0

KWP1

KWP2

KWP3

IOC3

IOC2

IOC1

IOC0

KWAD0

KWAD1

KWAD2

KWAD3

KWAD4

KWAD5

KWAD6

KWAD7

RXD0

TXD0

PWM4

IOC4

IOC5

API_EXTCLK

RXD1

TXD1

3rd

Func.

—

—

—

—

ETRIG0

ETRIG1

ETRIG2

ETRIG3

—

—

IRQ

XIRQ

AN0

AN1

AN2

AN3

AN4

AN5

AN6

AN7

—

—

MISO0

MOSI0

SCK0

ECLK

—

—

4th

Func

—

—

—

—

API_EXTCLK

ECLKX2

PWM2

PWM3

—

—

—

—

—

—

—

—

—

ACMPO

ACMPP

ACMPM

—

—

—

—

—

PWM5

—

—

5th

Func

—

—

—

—

PWM0

PWM1

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

SS0

—

—

Supply

—

—

N.A.

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

V DDA

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

V DDX

CTRL

—

PUCR/PDPEE

RESET pin

PUCR/BKPUE

PERP/PPSP

PERP/PPSP

PERP/PPSP

PERP/PPSP

PERT/PPST

PERT/PPST

PERT/PPST

PERT/PPST

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERS/PPSS

PERM/PPSM

PERM/PPSM

Reset

State

—

Down

Down

Up

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Up

Up

Up

Up

Up

Up

Disabled

Disabled

1

The regular I/O characteristics (see Section A.2, “I/O Characteristics ” ) apply if the EXTAL/XTAL function is disabled

MC9S12G Family Reference Manual, Rev.1.23

Freescale Semiconductor

73

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